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Computer architecture : a quantitative approach (6th ed.)
Hennessy J., Patterson D., Morgan Kaufmann Publishers Inc., Cambridge, MA, 2019. 936 pp. Type: Book (978-0-128119-05-1)
Date Reviewed: Aug 28 2019

After getting the basics from another Patterson and Hennessy book [1], reading Computer architecture: a quantitative approach is a perfect way to understand more advanced computer architecture concepts. The book mostly presents the parallelism techniques applied in different execution levels to get efficient program execution. It not only explains the theoretical concepts, but also includes empirical results gathered from experiments conducted on a variety of architectures, to demonstrate the effects of a quantitative approach.

Chapter 1 starts with a history of processors and excites readers for the future of computing. After giving instruction set architecture basics, it introduces performance, power, reliability, and cost issues, which are important design constraints in the computer architecture.

Chapter 2 explains the memory technologies, including dynamic random-access memory (DRAM), static random-access memory (SRAM), synchronous DRAM (SDRAM), graphics SDRAM (GDRAM), stacked DRAM, flash memory, and phase-change memory. The chapter also presents potential hardware and software optimizations to increase cache performance, for example, by providing numerical examples to make the cases practical. Another section in the chapter introduces virtualization as a protection mechanism by explaining virtual memory and virtual machines.

Chapter 3 examines instruction-level parallelism. It looks at several techniques applied in today’s computer systems: pipelining, branch predictors, speculation, and multiple issue. The chapter also covers the static and dynamic scheduling of instructions to eliminate the performance blockers of instruction-level parallelism techniques. While theoretical concepts are explained in detail, the empirical results (including performance improvements) are also reported.

Chapter 4 presents data-level parallelism by explaining single instruction, multiple data (SIMD) architectures. The specific implementations are vector processors, SIMD instructions, and graphics processing units (GPUs). First, the chapter explains how vector processors work by parallelizing the execution via vector registers and vector functional units instead of scalar ones. It then introduces SIMD multimedia instructions used in modern central processing units (CPUs) to accelerate graphics applications. Remaining sections look at GPU architectures, which are very popular for data-centric domains, covering both programming issues and architectural details. This part also includes CPU/GPU comparison results based on the roofline performance model, giving insight into both systems and programs running on those systems. The chapter includes the Pascal GPU architecture (instead of the older Fermi architecture included in the previous edition of the book) to introduce the innovations in a modern GPU architecture. It also updates its CPU/GPU comparison study by including additional data for the Intel Xeon Platinum server and NVIDIA P100 GPU performance.

As computer architecture design reaches the limits of instruction-level parallelism, multiprocessors, which implement thread-level parallelism, have become popular in recent years. Chapter 5 focuses on multiprocessor architectures. It introduces centralized shared-memory systems and distributed shared-memory systems, and discusses related issues like cache coherence, synchronization, and memory consistency. Moreover, the chapter explains alternative solutions (like snoopy cache coherence versus directory-based cache coherence) to the multiprocessing problems. At the end of the chapter, the characteristics of the state-of-the-art multicore processors are merged into a table to demonstrate the differences.

Chapter 6, first introduced in the previous edition, explains cloud systems, where request-level parallelism and data-level parallelism are exploited for higher performance, energy efficiency, and lower cost. The chapter explains both programming models and computer architecture by introducing basic concepts as well as example implementations.

Chapter 7--brand new to this edition--presents domain-specific architectures by providing efficient design principles for a specific domain. The chapter also gives an example domain, deep neural networks, which is a very popular area for many applications, especially data centers. After giving some background about deep neural networks by explaining basic concepts, some architectures are examined with architectural details and empirical results: Google’s tensor processing unit (TPU), Microsoft Catapult, and Intel Crest, designed for data centers; and Pixel Visual Core (PVC), designed for image processing and computer vision for mobile phones and Internet of Things (IoT) devices.

The book includes three appendices: Appendix A explains instruction set architecture basics, Appendix B reviews fundamental cache-related terms like associativity and miss penalty for those readers who do not know the basics, and Appendix C introduces pipelining concepts as a background for chapter 3.

Each edition adds a chapter on a cutting-edge technology and new trends, introducing the concepts for everyone. Readers will get the main idea and basic background for both understanding the concept and learning an example architecture implementation. This edition does this for deep neural networks, which are part of state-of-the-art systems in various disciplines. For all the performance comparisons, the book includes updates to the fifth edition. Notably, the up-to-date “Putting It All Together” sections provide real examples about the presented concepts. For the computer architecture area, it is so important to have the latest technology systems and obtain empirical performance results for those systems.

The book’s language and presentation make it easy for readers to understand the concepts. The presented material could be a very good resource, especially for experienced readers with a background in computer architecture. As a researcher in parallel computer systems and an instructor of advanced computer architecture topics, I often consult and reread the chapters. I think it is an excellent resource for the people in this field.

More reviews about this item: Amazon, Goodreads

Reviewer:  Isil Oz Review #: CR146673 (1912-0409)
1) Patterson, D. A.; Hennessy, J. L. Computer organization and design (5th ed.). Morgan Kaufmann, Waltham, MA, 2014.
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