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1 - 10 of 15
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A multi-level-optimization framework for FPGA-based cellular neural network implementation
Liu Z., Luo S., Xu X., Shi Y., Zhuo C. ACM Journal on Emerging Technologies in Computing Systems 14(4): 1-17, 2018. Type: Article
Multi-level optimizations for cellular neural network design with Zybo and ZedBoard field-programmable gate arrays (FPGAs), including the system, module, and design levels, are presented in this paper. At the system level, parallel and...
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Dec 3 2019 |
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Design automation techniques for approximation circuits: verification, synthesis and test
Chandrasekharan A., Große D., Drechsler R., Springer International Publishing, New York, NY, 2019. 130 pp. Type: Book (978-3-319989-64-8)
Finding the optimal energy savings corresponding to different quality constraints is one of the most important driving forces in approximate design, particularly for complex system on chips (SoCs) with multiple Internet protocols (IPs)...
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Apr 12 2019 |
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Modeling memristor radiation interaction events and the effect on neuromorphic learning circuits
Dahl S., Ivans R., Cantley K. ICONS 2018 (Proceedings of the International Conference on Neuromorphic Systems, Knoxville, TN, Jul 23-26, 2018) 1-8, 2018. Type: Proceedings
This paper presents several event models for memristor radiation interaction with Verilog-A. Radiation events can “affect all synapses or affect each synapse with different flux or intensity,” particularly for compl...
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Jan 28 2019 |
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CAEMO - a flexible and scalable high performance matrix algebra coprocessor for embedded reconfigurable computing systems
Woehrle H., Kirchner F. Microprocessors & Microsystems 56(C): 47-63, 2018. Type: Article
The authors present a novel cogurable accelerator engine for matrix operations (CAEMO) for improving computational performance on matrix- or block-based algorithms. Because many applications are based on the relationships between data ...
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Nov 13 2018 |
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Optimum transistor sizing of CMOS logic circuits using logical effort theory and evolutionary algorithms
Singh K., Jain A., Mittal A., Yadav V., Singh A., Jain A., Gupta M. Integration, the VLSI Journal 60 25-38, 2018. Type: Article
This paper proposes a methodology for optimizing and evaluating chip designs by coupling the well-known logical effort (LE) theory with heuristic algorithms. Complementary metal–oxide–semiconductor (CMOS)-level optimization can dramati...
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Mar 1 2018 |
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Optimization and quality estimation of circuit design via random region covering method
Bi Z., Zhou D., Wang S., Zeng X. ACM Transactions on Design Automation of Electronic Systems 23(1): 1-25, 2017. Type: Article
Bi et al. propose a random region covering theory to optimize designs on systems and circuits. The proposed work has been verified on a class-E power amplifier and a cascade local impedance attenuation amplifier. Both are analog circui...
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Jan 26 2018 |
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 A low-cost and high-performance architecture for robust human detection using histogram of edge oriented gradients
Sangeetha D., Deepa P. Microprocessors & Microsystems 53 106-119, 2017. Type: Article
Due to their programmability and hardware parallelism, field-programmable gate arrays (FPGAs) will be widely used to speed up edge/cloud computation on multiple image/video/big data processing systems and data centers. To the best of m...
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Nov 13 2017 |
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A tool for xMAS-based modeling and analysis of communication fabrics in Simulink
Zhao X., Lu Z. ACM Transactions on Modeling and Computer Simulation 27(3): 1-26, 2017. Type: Article
Because of the programmability challenge of timing-based hardware description languages (HDL) involving Verilog and VHDL, today many higher-level design languages and tools have been presented in academy and industry, in order to const...
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Sep 27 2017 |
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Hybrid method for minimizing service delay in edge cloud computing through VM migration and transmission power control
Rodrigues T., Suto K., Nishiyama H., Kato N. IEEE Transactions on Computers 66(5): 810-819, 2017. Type: Article
One of the most important requirements for an edge/cloud computing system is task latency, especially for some specific applications such as security alarm services and actuator feedback control in the Industrial Internet of Things (II...
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Sep 19 2017 |
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Towards ultra-efficient QCA reversible circuits
Chabi A., Roohi A., Khademolhosseini H., Sheikhfaal S., Angizi S., Navi K., DeMara R. Microprocessors & Microsystems 49(C): 127-138, 2017. Type: Article
In this paper, quantum-dot cellular automata (QCA) nanotechnology is introduced and employed to design some basic integrated circuit components. Compared to the traditional complementary metal-oxide semiconductor (CMOS) technology, a 2...
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May 1 2017 |
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